The Power of Speed and Simplicity
Selecting the optimal SiC device in the right power topology should be easy. This is why we built FETJet Calculator^{TM}. It helps power designers evaluate UnitedSiC devices in a variety of circuit topologies and quickly focus in on the most promising solutions. It is easy to use and provides the data needed to make design decisions quickly and confidently.
It all happens in 3 easy steps:
Select application
function
Select topology
Enter operating specs & select device
Features
 Easily evaluate the full range of UnitedSiC FETs and diodes in a variety of power applications
 ACDC
 Boost PFC; Totem pole PFC; Vienna rectifier; 2level voltage source inverter
 DCDC (nonisolated)
 Buck or boost with or without synchronous rectification with 3level boost
 DCDC (isolated)
 LLC in full or halfbridge variants; phase shift full bridge; dual active bridge w/phase control
 Supports CCM and BCM conduction modes
 ACDC
 Provides instant results to facilitate fundamental design decisions including:
 Overall efficiency
 Component losses by dynamic & conduction contributions
 Junction temperature
 Current stress levels
 Number of devices in parallel (if any)
 No registration required
 Terms of Use statement
FETJet Calculator Overview (4:47 mins)
How Does the FETJet Calculator Work? (4:46 mins)
How to Optimize Your SiC Power Device Selection Using the FETJet Calculator (3:40 mins)
FAQs

How accurate is FETJet Calculator?
There are tradeoffs between accuracy, ease of use, and speed. FETJet Calculator balances these by minimizing sources of error wherever possible and making simplifications that allow quick results with little loss of accuracy for typical applications. Accuracy is quite sufficient for the intended purpose of FETJet Calculator, which is a power device selection and topology comparison tool for use early in a design cycle.

What value for Rthcs (isolator pad) should I use?
Many applications require electrical isolation between the conductive backside of the package and the heatsink. A value of 0.6 °C/W is a conservative value for modern phasechange isolators. If using a nonphasechange isolator pad, then a value of 1.8 °C/W would be typical, but please refer data from the isolator material manufacturer. For surface mount on insulated metal substrate (IMS), please refer manufacturer’s data.

The AC/DC converters use sinetriangle pulse width modulation (SPWM). What if I am using space vector modulation (SVM)?
There are many variations of SVM, but typically the time spent in each zerostate is balanced to minimize switching transitions and loss. In this case, the conduction and switching losses of SPWM versus SVM are almost identical, and it is practical to simply use SPWM for the loss calculations for both SPWM and SVM. Overmodulation (pulse skipping) is not supported in Revision 1 of FETJet Calculator. Both SPWM and SVM yield mathematically meaningful results with a modulation index up to . However, only space vector can physically realize the 1.15x higher AC voltage with a given DC link voltage compared with SPWM. Furthermore, SVM applies almost exclusively to 3phase systems. With SPWM, each phase is independent of the others, and therefore any number of phases is supported.

The AC/DC converters have linetoneutral voltage as an input parameter. Why not use linetoline voltage?
Sinetriangle pulse width modulation (SPWM) is used to calculate power loss in AC/DC topologies. Although most systems are 3phase, each phase is independent of the others with SPWM, and entering linetoneutral voltage and then calculating linetoline voltage allows support for any number of phases. Losses calculated with SPWM and alternatingnulls space vector modulation (SVM) are almost identical, but unlike SPWM, the switching of each phase with SVM is interdependent on the other phases. For this reason, the vast majority systems using SVM are 3phase.

Power rating is an input parameter for each topology. Is this input or output power?
FETJet Calculator makes no distinction between input and output power. Power semiconductor efficiency in most systems is high enough to make the small error in power loss calculations from ignoring input versus output power negligible. The power rating can therefore be thought of as output power.

How is turnoff loss calculated for topologies with zero voltage turnon (ZVS)?
When a FET turns off and voltage across it increases from near zero to its steady offstate voltage, energy is stored in the output capacitance. In circuits with zero drainsource voltage turnon (ZVS), this output capacitance energy is recycled to the load and/or input capacitance. This is different from hard switching where output capacitance energy becomes lost (as heat) in the FET as it switches on. During turnoff, some of the drain current flows through the FET channel and creates heat, while the remainder of the current charges the output capacitance. It is impossible to measure these currents separately during turnoff; only the total is measured and used in turnoff energy calculations of the datasheet. It is however possible to measure the output capacitance and therefore to calculate its energy stored after turnoff. Again, because the output capacitance energy is recycled, the turnoff energy in circuits with ZVS turnon is calculated as the difference between the datasheet (hard switched) turnoff energy E_{off} minus the output capacitance energy corresponding to the switched voltage. Sometimes the resulting turnoff switching loss is so low that the result is displayed as zero.

Why is inductor ripple current an input parameter for some topologies?
Inductor ripple current as an input parameter is used to finetune switching loss estimates. It has negligible effect on conduction loss in the corresponding topologies.

Is transient analysis supported, for example motor startup?
Automatic transient analysis is not supported in this revision of FETJet Calculator.

What is difference between “Number of legs” and “Number of parallel FETs or diodes”?
Some topologies have the option of multiple legs, meaning all the FETs, diodes, and inductors are replicated, so the converter circuit is “soft paralleled”. Power rating is the sum of the power in all legs (not per leg). Multiple legs would typically have interleaved switching, although this has no effect on the loss calculations. Number of parallel FETs or diodes means the number of directly paralleled FETs or diodes within each circuit leg. Power loss is calculated per FET and per diode, and then summed according to the total number of FETs and diodes in all legs to yield the total converter loss. Consider a boost converter as an example having two parallel FETs and one diode per leg, and there are three legs. Each leg would process onethird the power rating, and there would be 3 legs * 2 FETs per leg = 6 FETs total, and 3 legs * 1 diode per leg = 3 diodes total; total loss = 6 FETs * loss per FET + 3 diodes * loss per diode.
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